发明名称 |
No-Disturb Bit Line Write for Improving Speed of eDRAM |
摘要 |
A method of operating a memory circuit includes providing the memory circuit. The memory circuit includes a memory cell; a word line connected to the memory cell; a first local bit line and a second local bit line connected to the memory cell; and a first global bit line and a second global bit line coupled to the first and the second local bit lines, respectively. The method further includes starting an equalization to equalize voltages on the first and the second local bit lines; stopping the equalization; and after the step of starting the equalization and before the step of stopping the equalization, writing values from the first and the second global bit lines to the first and the second local bit lines.
|
申请公布号 |
US2009141568(A1) |
申请公布日期 |
2009.06.04 |
申请号 |
US20080055095 |
申请日期 |
2008.03.25 |
申请人 |
KENGERI SUBRAMANI;HSU KUOYUAN PETER;WANG BING |
发明人 |
KENGERI SUBRAMANI;HSU KUOYUAN PETER;WANG BING |
分类号 |
G11C7/00;G11C8/00 |
主分类号 |
G11C7/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|