发明名称 Frequency offset correction circuit device
摘要 A semiconductor circuit device is provided which can attain more stable operations against noise in a data communication system without increasing the power consumption of an overall system, thereby improving the reliability of data communication. For a demodulation baseband signal (S11) obtained by performing digital processing on an output signal (S6) from an AD converter (6), the maximum value (S12) and the minimum value (S13) are detected as digital values by a maximum value holding circuit (11) and a minimum value holding circuit (12), an averaging circuit (13) obtains an average value (intermediate value) of the maximum value and the minimum value and detects a frequency offset amount (S14), and the frequency offset amount is fed back to a threshold value of data decision (14), so that binarized demodulation data (S15) is outputted in which the offset of the demodulation baseband signal is corrected.
申请公布号 US7542527(B2) 申请公布日期 2009.06.02
申请号 US20050219774 申请日期 2005.09.07
申请人 PANASONIC CORPORATION 发明人 OGAWA JUN;SHIRAIWA MOTOTUGU
分类号 H04L27/06;H03K9/00;H04L27/00 主分类号 H04L27/06
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