发明名称 Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes
摘要 A method and apparatus for improved performance for reloading translation look-aside buffers in multithreading, multi-core processors. TSB prediction is accomplished by hashing a plurality of data parameters and generating an index that is provided as an input to a predictor array to predict the TSB page size. In one embodiment of the invention, the predictor array comprises two-bit saturating up-down counters that are used to enhance the accuracy of the TSB prediction. The saturating up-down counters are configured to avoid making rapid changes in the TSB prediction upon detection of an error. Multiple misses occur before the prediction output is changed. The page size specified by the predictor index is searched first. Using the technique described herein, errors are minimized because the counter leads to the correct result at least half the time.
申请公布号 US7543132(B1) 申请公布日期 2009.06.02
申请号 US20040880985 申请日期 2004.06.30
申请人 SUN MICROSYSTEMS, INC. 发明人 GROHOSKI GREG F.;SAULSBURY ASHLEY;JORDAN PAUL J.;SHAH MANISH;SUGUMAR RABIN A.;DEBBAGE MARK;IYENGAR VENKATESH
分类号 G06F12/10 主分类号 G06F12/10
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