发明名称 COUPLING WIRING SUBSTRATE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a coupling wiring substrate which can prevent reduction in quality due to its substrate surface damages, such as, cracks and peel offs. <P>SOLUTION: The semiconductor packaged coupling wiring substrate 100, having a plurality of wiring substrate regions includes a plurality of wiring substrate regions 22, each of which has the same wiring pattern 28 and cut-out portions in separating the coupling wiring substrate 100 into the respective wiring substrate regions 22; a plurality of slots 101 of the cut-out portions are provided in the boundary region of each wiring substrate 100; and the wiring patterns 28 are formed in a region of each wiring substrate region 22, except a region which does not have a plurality of slots 101. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009117654(A) 申请公布日期 2009.05.28
申请号 JP20070289786 申请日期 2007.11.07
申请人 PANASONIC CORP 发明人 NODA TAKASHI
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
主权项
地址