| 摘要 |
PROBLEM TO BE SOLVED: To provide an ESD protection circuit for sufficiently protecting elements in a semiconductor integrated circuit and stabilizing operation. SOLUTION: The ESD protection circuit includes: a first CR time constant circuit 20 consisting of a first capacitor 21 and a first resistor 22; a second CR time constant circuit 30 having a time constant larger than that of the first CR time constant circuit 20 consisting of a second capacitor 31 and a second resistor 32; and a state transition circuit 40 for turning on an NMOS transistor 10 for clamping for a period of the time constant of the second CR time constant circuit 30, when an ESD pulse having a rising period steeper than the time constant of the first CR time constant circuit 20 is applied to a power line 1_1, and turning off the NMOS transistor 10 for clamping, when voltage having a rising period relatively more gradual than the time constant of the first CR time constant circuit 20 is applied to the power line 1_1. COPYRIGHT: (C)2009,JPO&INPIT
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