发明名称 DDR MEMORY SYSTEM WITH ODT CONTROL FUNCTION
摘要 PROBLEM TO BE SOLVED: To suppress signal reflection by a simple method in a DDR memory system composed of chip selects having different data bus widths. SOLUTION: The DDR (double data rate) memory system is provided with a function for controlling ODT (on die termination) for each chip select, and is further provided with a memory controller, a first data bus and a second data bus connected to the memory controller, a first chip select connected to the first data bus, and a second chip select connected to the first data bus and the second data bus. The ODT resistance of the first chip select is controlled according to the ODT resistance (reference value) of the second chip select. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009116641(A) 申请公布日期 2009.05.28
申请号 JP20070289326 申请日期 2007.11.07
申请人 SEIKO EPSON CORP 发明人 SAITO TAKESHI
分类号 G06F12/00;G11C11/401;G11C11/407 主分类号 G06F12/00
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