| 摘要 |
A thin film transistor ("TFT") substrate includes first through third TFTs, first and second sub pixel electrodes, and a voltage down capacitor. A control terminal and an input terminal of the first and the second TFT are connected to an (N-1)-th gate line and a data line, respectively. The first sub pixel electrode is connected to an output terminal of the first TFT. The second sub pixel electrode is connected to an output terminal of the second TFT. A control terminal and an input terminal of the third TFT are connected to an N-th gate line and the first sub pixel electrode, respectively. The voltage down capacitor is connected to an output terminal of the third TFT. A maximum data voltage transferred from the data line to at least one of the first and second sub pixel electrodes has a range of approximately 14 volts to approximately 16 volts.
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