| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which improves controllability of the operation voltage thereof while suppressing increase in circuit scale. <P>SOLUTION: The semiconductor memory device includes: a plurality of memory cells MT each of which has an electric charge accumulation layer and a control gate; word lines WL connected to the control gates; a driver circuit 53 selecting any one of the word lines WL while applying voltage to the selected word line and non-selected word lines; first and second charge pump circuit 61, 62; and a voltage generating circuit 60 outputting voltage generated by the first and the second charge pump circuits 61, 62 to the driver circuit 53. The first charge pump circuit 61 is exclusively used for generating voltage to be applied to the word line being adjacent to the selected word line out of the non-selected word lines, the second charge pump circuit 62 generates voltage to be applied to the second word line not adjacent thereto. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
