发明名称 DDR MEMORY SYSTEM PROVIDED WITH ODT CONTROL FUNCTION
摘要 PROBLEM TO BE SOLVED: To minimize a signal reflection in a simple configuration in a DDR memory system configured with chip selects having different data bus widths. SOLUTION: The DDR (Double Data Rate) memory system is equipped with a function to control ODT (On Die Termination) for each chip select and is further equipped with: a memory controller; a first chip select to be selected by a first chip select signal from the memory controller; a second chip select which is selected by a second chip select signal from the memory controller and has data bus width larger than that of the first chip select; a first data bus for connecting the memory controller with the second chip select and the first chip select; and a second data bus for connecting the memory controller with the second chip select and further with a terminating resistor which is mounted on a substrate in advance. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009116962(A) 申请公布日期 2009.05.28
申请号 JP20070289325 申请日期 2007.11.07
申请人 SEIKO EPSON CORP 发明人 SAITO TAKESHI
分类号 G11C11/401;G06F12/00;G11C11/407 主分类号 G11C11/401
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