发明名称 RECEIVER, METHOD, AND PROGRAM FOR SAMPLING DATA, TAKING IN ACCOUNT SYSTEM CLOCKS OF A PLURALITY OF SYSTEM SIGNALS
摘要 <P>PROBLEM TO BE SOLVED: To provide a receiver, or the like, capable of obtaining sampling data which is an integral multiple of respective system clocks, while suppressing the operation clocks to be low in an A/D converter and a signal processing portion. <P>SOLUTION: The receiver comprises a down-sampler means for thinning out data output from a first filter means, bsed on the down-sample ratio, and an up-sampler means for inserting null value data into data output from a down-sampler means according to an up-sample ratio. A sampling frequency determining means of the receiver calculates the down- and up-sample ratios for one or more sampling frequencies Fs, which is an integral multiple of the largest common divisor of the system clocks of a plurality of system signals in an available sampling frequency range F, and derives a minimum sampling frequency Fs from among one or more sampling frequencies F at a sampling rate after up-sampling. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009117925(A) 申请公布日期 2009.05.28
申请号 JP20070285611 申请日期 2007.11.02
申请人 KDDI CORP 发明人 KITAYABU TORU;MAEYAMA TOSHIYUKI
分类号 H04L27/20;H04L27/38 主分类号 H04L27/20
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