发明名称 ARITHMETIC PROCESSING APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To suppress unnecessary power consumption during execution of a repeat block (instruction code group to be executed repeatedly) in a program in a microprocessor which executes an instruction code including the repeat block fetched from an instruction cache memory. <P>SOLUTION: In execution of the repeat block in the program, for example, storage of instruction code from the head of the repeat block onto a repeat buffer 14 is started when the program execution is returned to the head of the repeat block by the first repetition of the repeat block. After the storage of instruction code to the repeat buffer 14 is completed, supply of instruction code from the repeat buffer 14 to an instruction fetch unit 18 is performed every time when the program execution is returned to the head of the repeat block by repetition of the repeat block. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009116621(A) 申请公布日期 2009.05.28
申请号 JP20070288965 申请日期 2007.11.06
申请人 TOSHIBA CORP 发明人 HOSODA SOICHIRO
分类号 G06F9/32;G06F9/38;G06F12/08 主分类号 G06F9/32
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