| 摘要 |
PROBLEM TO BE SOLVED: To provide a device capable of efficiently narrowing down a short-circuit fault location between wirings of a semiconductor integrated circuit. SOLUTION: An expected value of a wiring contained in a fault candidate wiring pair is input to an XOR operation part 22 as for each of a plurality of test patterns, and the operation part finds and outputs the exclusive OR (XOR). IDDQ measured values of the semiconductor integrated circuit with respect to those test patterns are input to an IDDQ quantization section 23, and the quantization section quantizes an input IDDQ measurement value to 1 when the input value is larger than a predetermined threshold, and to 0 in cases other than that, and outputs those values. As for each fault candidate wiring pair, a comparison section 24 compares an XOR with a quantized IDDQ in each test pattern, finds the number of times of their coincidence, and performs output while considering that the larger the number of times of their coincidence of a fault candidate wiring pair is, the higher its fault possibility is. COPYRIGHT: (C)2009,JPO&INPIT
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