发明名称 LOOP-BACK TESTING METHOD AND APPARATUS FOR IC
摘要 A test system for testing operability of integrated circuits includes: a first IC, for modulating a first signal to generate a first modulated signal and transmitting the first modulated signal, and for receiving a second modulated signal and demodulating the second modulated signal to generate a second signal; a first loop antenna, coupled to the first IC, for receiving the first modulated signal and sending the first modulated signal back to the first IC as the second modulated signal; and a tester circuit coupled to the first IC, for generating the first signal to the first IC, receiving the second signal from the first IC, and comparing the first signal and the second signal to determine the operability of the first IC.
申请公布号 US2009134903(A1) 申请公布日期 2009.05.28
申请号 US20070946806 申请日期 2007.11.28
申请人 HSIEH CHIH-YUAN;YEH CHUN-WEN 发明人 HSIEH CHIH-YUAN;YEH CHUN-WEN
分类号 G01R31/26 主分类号 G01R31/26
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