发明名称 Wafer structure and bumping process
摘要 A wafer structure including a semiconductor substrate, elastic elements, under bump metallurgic (UBM) layers and bumps is provided. The semiconductor substrate has an active surface, and it includes pads disposed on the active surface. The elastic elements are disposed on the pads respectively. Each elastic element has an opening, such that a portion of each pad is exposed from the opening of the corresponding elastic element. The UBM layers cover the elastic elements respectively, and each UBM layer is connected to the corresponding pad. The bumps are disposed on the UBM layers respectively.
申请公布号 US7538435(B2) 申请公布日期 2009.05.26
申请号 US20050314780 申请日期 2005.12.19
申请人 CHIPMOS TECHNOLOGIES INC.;CHIPMOS TECHNOLOGIES (BERMUDA) LTD. 发明人 WANG JIUNHENG
分类号 H01L29/72;H01L23/48 主分类号 H01L29/72
代理机构 代理人
主权项
地址