发明名称 Integrated circuit including resistivity changing memory cells
摘要 Wordline stacks are arranged parallel at a distance from one another on a substrate surface. Bitlines are arranged transversely to the wordline stacks at a distance from one another. Source/drain regions are formed as doped regions in the vicinity of the wordline stacks. A resistive layer is disposed between a plurality of the source/drain regions and the bitlines and formed of a material having a resistance that is switched by an applied voltage. Source lines are arranged parallel to the wordline stacks so that they connect further pluralities of the source/drain regions.
申请公布号 US7538411(B2) 申请公布日期 2009.05.26
申请号 US20060411994 申请日期 2006.04.26
申请人 INFINEON TECHNOLOGIES AG 发明人 WILLER JOSEF;UFERT KLAUS-DIETER
分类号 H01L29/00 主分类号 H01L29/00
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