发明名称 Substrate warpage control and continuous electrical enhancement
摘要 A dummy circuit pattern is disclosed on a surface of a substrate for a semiconductor package. The dummy circuit pattern includes a plurality of straight line segments and a plurality of interrupt patterns to breakup one or more of the straight line segments. The interrupt patterns are provided so as to not electrically isolate areas of the dummy pattern, thus providing electrical continuity across the dummy circuit pattern.
申请公布号 US7538438(B2) 申请公布日期 2009.05.26
申请号 US20050171819 申请日期 2005.06.30
申请人 SANDISK CORPORATION 发明人 YU CHEEMEN;WANG KEN JIAN MING;CHIU CHIN-TIEN;LIAO CHIH-CHIN;CHEN HAN-SHIAO
分类号 H01L23/48;H01L23/52;H01L29/40 主分类号 H01L23/48
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