| 摘要 |
A system and method for automatic elimination of design rule violations during construction of a mask layout block are disclosed. The method includes analyzing a selected position for a polygon in a mask layout block and obtaining one or more design rules associated with the polygon from a technology file. The method provides an Advise Area associated with the selected position for the polygon that graphically represents space, enclosure, width, notch or any other topological condition in the mask layout block where the selected position complies with the design rule violation. The Advice Area is associated with the selected position to alert the mask designer about any process design rule violation. The method and system also provides an option to automatically correct the identified process design rule, maintaining the process design rules (DRC Clean), layout connectivity (LVS Clean), Circuit Timing constraints and DFM (Design for Manufacturing) correctness. |
