发明名称 NOISE REDUCTION CIRCUIT, AND ELECTRONIC DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To reduce noise included in both voltage levels of a high voltage side and a low voltage side of a signal that enters a transmission line, with simple circuit configuration. <P>SOLUTION: A noise reduction circuit includes: at least one first logic unit 10 which is any one of an AND unit for ANDing an input signal IS10 and an output signal DLS10 of a delay unit DL10 which delays the input signal, and an OR unit for ORing the signals; and at least two second logic units 12, 14 which are provided on a post-stage side of the first logic unit and are the other, different from the one, of the AND unit and the OR unit. The at least one logic unit 10 and the at least two second logic units 12, 14 are cascade-connected. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009111907(A) 申请公布日期 2009.05.21
申请号 JP20070284237 申请日期 2007.10.31
申请人 SEIKO EPSON CORP 发明人 GOMI MASAKI
分类号 H03K5/1252 主分类号 H03K5/1252
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