| 发明名称 |
ARSENIC AND PHOSPHORUS DOPED SILICON WAFER SUBSTRATES HAVING INTRINSIC GETTERING |
| 摘要 |
A process for the preparation of low resistivity arsenic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates.
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| 申请公布号 |
US2009130824(A1) |
申请公布日期 |
2009.05.21 |
| 申请号 |
US20080347336 |
申请日期 |
2008.12.31 |
| 申请人 |
MEMC ELECTRONIC MATERIALS, INC. |
发明人 |
FALSTER ROBERT J.;VORONKOV VLADIMIR V.;BORIONETTI GABRIELLA |
| 分类号 |
H01L21/322 |
主分类号 |
H01L21/322 |
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