发明名称 PROCESS FOR MANUFACTURING INTERCONNECTION
摘要 PROBLEM TO BE SOLVED: To provide an integrated circuit, having a dual-damascene structure, and to provide a manufacturing process for forming the dual-damascene structure, while eliminating superfluous steps. SOLUTION: A process for forming the dual-damascene structure is provided. The process is for forming a stack including an insulator layer and a stop layer, having two masks formed on the stack. One of the masks is used for forming a via or a contact opening in the insulator layer, and the second mask is used for forming a recess for interconnection in the integrated circuit. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009111429(A) 申请公布日期 2009.05.21
申请号 JP20090032389 申请日期 2009.02.16
申请人 ALCATEL-LUCENT USA INC 发明人 SEIRII CHITEIPEDEI;MERCHANT SAILESH MANSINH
分类号 H01L21/768;H01L23/522;H01L21/316;H01L21/3205;H01L23/52 主分类号 H01L21/768
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