Methods for Inspecting and Optionally Reworking Summed Photolithography Patterns Resulting from Plurally-Overlaid Patterning Steps During Mass Production of Semiconductor Devices

摘要

A batch of wafers is temporarily stalled during a Double Pattern Technology (DPT) process before a temporary representation of a second of to-be-overlaid patterns is permanently combined with a first of the patterns. Sampled ones of the stalled wafers are inspected to determine if sufficiently close alignment is present between the two patterns. If excessive misalignment is detected (e.g., by SEM microscopy), the second but still temporary pattern representation is erased from all wafers of the batch and the batch is routed for rework and corrected reestablishment of the temporary representation of the second of to-be-overlaid patterns.