发明名称 SILICONE SUBSTRATE FOR PACKAGE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a silicone substrate for package, which prevents the occurrence of disconnection between a through electrode and thin film wiring at a base of a cavity. <P>SOLUTION: The silicone substrate 10 for package includes through electrodes 14 with which through-holes 12 passing to a backside of the substrate 10 from the base 16B of the cavity storing an electronic device chip are filled. An end on a cavity base 16B-side of the through electrode 14 has a connecting part with wiring constituting an electric circuit comprising the electronic device chip. (1) The substrate includes thin film wiring 20 as wiring and the connecting part is reinforced by a conductor bonded to thin film wiring 20, and/or (2) the substrate includes a wire bonding part as wiring and the connecting part is formed by wire bonding with the end on the cavity base 16B-side of the through electrode 14. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009111082(A) 申请公布日期 2009.05.21
申请号 JP20070280695 申请日期 2007.10.29
申请人 SHINKO ELECTRIC IND CO LTD 发明人 SHIRAISHI AKINORI;MURAYAMA HIROSHI;TAGUCHI YUICHI;HARUHARA MASAHIRO;AZUMA MITSUTOSHI
分类号 H01L23/12 主分类号 H01L23/12
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