发明名称 LOGICAL OPERATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a logical operation processor for stably supplying a common clock, and for easily exchanging each system of a redundant system, and for securing the synchronizing precision of each system. SOLUTION: This logical operation processor is provided with a common clock information source 16 for notifying a common clock for setting the synchronization of a redundant system; a communication path housing part 15 for monitoring a communication path 12, and for sending common clock notification to the communication path 12 in a predetermined order while preventing collision, and for housing it in the communication path 12; a clock extraction part 6 for extracting the clock notification multiplexed on the communication path 12; and a logical operation processing part 17 for performing logical operation. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009110040(A) 申请公布日期 2009.05.21
申请号 JP20070278431 申请日期 2007.10.26
申请人 TOSHIBA CORP 发明人 ANDO HIKARI
分类号 G05B9/03 主分类号 G05B9/03
代理机构 代理人
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