发明名称 Interrupt jitter suppression
摘要 A data processing apparatus comprises a processing unit which is responsive to a plurality of interrupt signals to carry out a corresponding interrupt routine. On receipt of an interrupt signal, the processing unit stores data values from a plurality of registers onto a data stack and carries out the corresponding interrupt routine. Thereafter the processor returns the data values from the data stack to the registers and carries on the processing it was performing when the interrupt was received. If a higher priority interrupt is received whilst the processor is transferring register values to or from the data stack, that transferral is abandoned and the processing unit immediately begins transferring data values from the registers to the data stack in response to the higher priority interrupt.
申请公布号 US2009132744(A1) 申请公布日期 2009.05.21
申请号 US20080285599 申请日期 2008.10.09
申请人 ARM LIMITED 发明人 CRASKE SIMON JOHN
分类号 G06F13/24 主分类号 G06F13/24
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