| 摘要 |
A wafer level packaging method for optoelectronic components such as VCSEL arrays and photodetectors, comprises: a semiconductor die having a cavity 102 for receiving a flip-chip mounted optoelectronic component and solder bumps 106 which provide electrical connection to the other side of the die through via interconnections. The via connections contact interconnect traces on the other side of the die which connect to another component such as a microprocessor 900 (see figure 9) A plastic optical connector housing is moulded onto the die and driving circuits for the optoelectronic component may be formed in the surface of the die. |
