DATA REPRODUCTION CIRCUIT

摘要

Provided is a data recovery circuit including an input data phase detection circuit for outputting a gate signal synchronized with a rising phase of input data, a gated multiphase oscillator for instantly generating N-phase clocks based on the gate signal as a trigger, data discriminating and reproducing circuits for outputting sampled data of the input data which are synchronized with the clocks, a continuous clock generation circuit for generating a continuous clock which is a reference clock, continuous clock synchronization circuits for synchronizing the sampled data with the continuous clock and outputting the synchronized sampled data as phase synchronization data, and a phase selector for selecting the phase synchronization data having an optimum discrimination phase with the largest phase margin with respect to the input data and outputting the selected phase synchronization data as recovery data.