发明名称
摘要 <P>PROBLEM TO BE SOLVED: To reduce the power consumption by making off the supply of voltage to the terminal part of a memory bus line in the state where exchange of data is not carried out between a memory controller and a memory device. <P>SOLUTION: A CPU 10 outputs a power saving mode transfer signal. A DC/DC controller 12 makes off the supply of voltage to the terminal 16 of the memory bus line 14 when an access to the memory device 30 is not detected when the power saving mode transfer signal is inputted. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP4265274(B2) 申请公布日期 2009.05.20
申请号 JP20030120982 申请日期 2003.04.25
申请人 发明人
分类号 G06F1/32;G06F1/26;G06F12/00;G06F13/16 主分类号 G06F1/32
代理机构 代理人
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