发明名称 Logic circuit
摘要 A first current source generating a current I0+I when a control signal is in 'H' level and a current I0 when it is in 'L' level, a current mirror circuit transferring a current generated in the first current source and composed of first and second MOS transistors, and a second current source connected to the second transistor and generating I0+I are provided. Further, a node branched from a connection node between the second transistor and the second current source is formed, and a logic unit including a flip-flop circuit formed of a differential amplifier is driven through the node. The logic unit is in an active state when the control signal is in 'H' level and it is in an inactive state when the signal is in 'L' level. When the logic unit is in an active state, it processes a data input signal to generate data output signal.
申请公布号 US7535261(B2) 申请公布日期 2009.05.19
申请号 US20060492894 申请日期 2006.07.26
申请人 HITACHI, LTD. 发明人 YUUKI FUMIO;YAMASHITA HIROKI
分类号 H03K19/20;H03K17/16;H03K19/003;H03K19/0175;H03K19/094 主分类号 H03K19/20
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