发明名称 METHOD AND SYSTEM FOR CHIP DESIGN USING REMOTELY LOCATED RESOURCES
摘要 PROBLEM TO BE SOLVED: To provide a method and a system for chip design using remotely located resources. SOLUTION: A multi-faceted design platform (104) acts as a tool for front-end hardware IC designers who design complex core base system on a chip. The design platform (104) uses a network to search and gain access to previously designed virtual core blocks. The design platform (104) provides a means to select (306) and transfer (308) all relevant information regarding the selected virtual core blocks and allows the designer to immediately incorporate the virtual core block into the new SoC design. The design platform (104) further generates the appropriate source core files (320) for immediate use with a plurality of known verification tools to verify both the integration and connectivity of the virtual core blocks as wel as the basic functions of the SoC design. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009104645(A) 申请公布日期 2009.05.14
申请号 JP20090022053 申请日期 2009.02.02
申请人 CADENCE DESIGN SYSTEMS INC 发明人 ZIZZO CLAUDIO
分类号 G06F17/50 主分类号 G06F17/50
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