发明名称 LAMINATION ORDER INSPECTION METHOD AND WIRING BOARD MANUFACTURING METHOD
摘要 <p>A lamination order inspection method for inspecting the lamination order of a multilayer wiring board and a wiring board manufacturing method. A lamination order inspection method is for inspecting the lamination order of the multilayer wiring board (10) having a plurality of conductor layers (11L1 to 11L6) that are alternately laminated with a plurality of insulation layers (12L1 to 12L5) and individually comprise conductor patterns and having through conductors (11L1 to 11L6) penetrating a plurality of insulation layers with a plurality of conductor layers scheduled to be laminated in a predetermined order. The lamination order inspection method has a measuring process for measuring the electrical resistance value of a conductor path P1 comprising the conductor patterns (146, 151 to 154, 161) and the through conductors (11L1 to 11L6) and having both ends (E1 and E2) reaching one or both of the surface and the back of the multilayer wiring board via all of a plurality of conductor layers once or more and a comparison process for comparing the electrical resistance value measured by this measuring process with a reference electrical resistance value that the conductor path (P1)has in the case when a plurality of conductor layers are laminated in a predetermined order.</p>
申请公布号 WO2009060505(A1) 申请公布日期 2009.05.14
申请号 WO2007JP71499 申请日期 2007.11.05
申请人 FUJITSU LIMITED;MUKOUYAMA, TAKAHIDE 发明人 MUKOUYAMA, TAKAHIDE
分类号 H05K3/46 主分类号 H05K3/46
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