发明名称 ACS UNIT OF A VITERBI DECODER AND METHOD FOR CALCULATING A BIT ERROR RATE BEFORE A VITERBI DECODER
摘要 An ACS unit of a Viterbi decoder and a method for calculating the bit error rate (BER) before Viterbi decoder are provided. The ACS unit includes a state calculator and a BER calculator. The state calculator calculates the state metric of a corresponding target state in the trellis diagram and selects one of two candidate source states as the selected source state of the target state. The state calculator also provides a selection signal indicating the selected source state. The BER calculator is coupled to the state calculator for providing the sum of the BER of the selected source state and the bit error count (BEC) of the transition from the selected source state to the target state as the BER of the target state.
申请公布号 US2009125794(A1) 申请公布日期 2009.05.14
申请号 US20070938788 申请日期 2007.11.13
申请人 TENOR ELECTRONICS CORPORATION 发明人 LI SHU-MEI;CHANG SZU-CHUNG
分类号 H03M13/41;G06F11/00 主分类号 H03M13/41
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