发明名称 MEMORY CELLS
摘要 <p>A method of manufacturing an integrated circuit (IC), comprising: defining a plurality of continuous active areas; forming conducting lines extending over the active areas; and using the conducting lines as a mask, introducing dopant into the active areas. Connections are provided between doped regions and conducting lines to form first and second circuit portions, at least one active area being continuous between those portions. In that active area, connections are provided between doped regions and conducting lines to form a pair of diode-connected transistors in reverse bias to one another between the first and second circuit portions, connected so as to leave a shared, unconnected doped region between the pair. The present invention also relates to a corresponding IC.</p>
申请公布号 WO2009059906(A1) 申请公布日期 2009.05.14
申请号 WO2008EP64459 申请日期 2008.10.24
申请人 ICERA INC;MONK KENNETH, TREVOR 发明人 MONK KENNETH, TREVOR
分类号 H01L27/11 主分类号 H01L27/11
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