发明名称 |
Write driver circuit for phase-change memory, memory including the same, and associated methods |
摘要 |
A write driver circuit for a memory that includes phase-change memory cells changeable between a RESET state resistance and a SET state resistance in response to an applied current pulse, the write driver circuit including a write current level adjusting unit configured to determine first to n-th SET state current levels in response to a SET state current level signal, where n is an integer greater than 1, and configured to determine a RESET state current level in response to a RESET state current level signal, and a write current output unit configured to generate one of a SET state current pulse and a RESET state current pulse corresponding to a SET state current level or a RESET state current level determined by the write current level adjusting unit.
|
申请公布号 |
US2009122593(A1) |
申请公布日期 |
2009.05.14 |
申请号 |
US20080292200 |
申请日期 |
2008.11.13 |
申请人 |
CHO BEAK-HYUNG;KIM KWANG-HO;KIM YOUNG-PIL |
发明人 |
CHO BEAK-HYUNG;KIM KWANG-HO;KIM YOUNG-PIL |
分类号 |
G11C11/00 |
主分类号 |
G11C11/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|