发明名称 COMPARATOR AND A-D CONVERTER
摘要 A comparator is provided that outputs a comparison result obtained by comparing two signals. The comparator includes a positive buffer that converts a positive comparison signal, which has a level according to a difference between the two signals, into a positive logic signal that indicates a logic level; a negative buffer that converts a negative comparison signal, which has a level that is inverted in relation to the positive comparison signal, into a negative logic signal that indicates a logic level that is inverted in relation to the positive logic signal; a latch core that, at a timing at which a latch period in which the comparison result is held begins, acquires the logic level of the positive logic signal and the logic level of the negative logic signal and holds the acquired logic levels; and a potential control section that, prior to a timing at which the latch period ends, sets an output end of the positive buffer to have a potential that is identical to that of an output end of the negative buffer.
申请公布号 US2009121911(A1) 申请公布日期 2009.05.14
申请号 US20070936805 申请日期 2007.11.08
申请人 ADVANTEST CORPORATION 发明人 KURAMOCHI YASUHIDE
分类号 H03M1/12;H03K5/22 主分类号 H03M1/12
代理机构 代理人
主权项
地址