发明名称 |
BIT SYNCHRONIZATION CIRCUIT WITH PHASE TRACKING FUNCTION |
摘要 |
A bit synchronization circuit comprising an initial phase determining unit for rapidly determining, during a period of receiving a preamble of burst data, a clock with a phase synchronized with received burst data from among multi-phase clocks having the same frequency as an internal reference clock and a phase tracking unit for modifying the synchronized phase clock responsive to phase variation of received data during a period of receiving a payload of burst data by taking the synchronized phase clock determined by the initial phase determining unit as an initial phase. The bit synchronization circuit retimes burst data with a data retiming clock having a predetermined phase relation with the synchronized phase clock and outputs the burst data in synchronization with the internal reference clock.
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申请公布号 |
US2009123160(A1) |
申请公布日期 |
2009.05.14 |
申请号 |
US20090349914 |
申请日期 |
2009.01.07 |
申请人 |
HITACHI COMMUNICATION TECHNOLOGIES, LTD. |
发明人 |
YAJIMA YUSUKE;KAZAWA TOHRU;ASHI YOSHIHIRO |
分类号 |
H04L7/00;H04B10/00;H04L27/06 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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