发明名称 Configurable error handling apparatus and methods to operate the same
摘要 Configurable error handling apparatus and methods to operate the same are disclosed. An example apparatus comprises a processor core in a semiconductor package, a hardware functional block in the semiconductor package, an error handler in the semiconductor package, wherein the error handler is configurable to route error data from the hardware functional block to at least one of a first error log or a second error log and to route error signals from the hardware functional block to at least one of an operating system or firmware, and wherein the processor core configures the error handler and the hardware functional block.
申请公布号 US7533300(B2) 申请公布日期 2009.05.12
申请号 US20060352961 申请日期 2006.02.13
申请人 INTEL CORPORATION 发明人 MARISETTY SURESH;GANESAN BASKARAN;DOSHI GAUTAM BHAGWANDAS;NACHIMUTHU MURUGASAMY;YAMADA KOICHI;VARGAS JOSE A.;CROSSLAND JIM;DOMEN STAN J.
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
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