发明名称 ERROR DETECTION/CORRECTION CIRCUIT, SEMICONDUCTOR MEMORY CONTROLLER, AND ERROR DETECTION/CORRECTION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide an error detection/correction circuit capable of efficient error correction, a semiconductor memory controller provided therewith, and an error correction method. <P>SOLUTION: The error detection/correction circuit 3 includes a syndrome calculation circuit 7 for calculating a syndrome of received information including an input error correction code; a polynomial derivation circuit 8 for deriving an error position polynomial; a Chien search circuit 9 for finding an error position of the received information; and an error correction circuit 10 for correcting an error of the received information, in which every time the Chien search circuit 9 specifies the error position, the error correction circuit 10 corrects the error of the received information in the specified error position, then outputs the corrected information. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009100369(A) 申请公布日期 2009.05.07
申请号 JP20070271631 申请日期 2007.10.18
申请人 TOSHIBA CORP 发明人 MURAOKA HIROAKI
分类号 H03M13/15;G11C16/06;G11C29/42 主分类号 H03M13/15
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