发明名称 FUSE LATCH CIRCUIT AND FUSE LATCH METHOD
摘要 PROBLEM TO BE SOLVED: To provide a fuse latch circuit stably detecting and holding a state of a fuse element. SOLUTION: This fuse latch circuit is used for a semiconductor device driven by means of setting an operation mode based on a command to be input from the outside to a register to which the operation mode is set. In this circuit, a period tFPRE to start a precharge operation for reading out the state of the fuse element is set when receiving an external command to reset an operation mode register (MRS reset command) after the power is turned on, and also a period tFSET to read out and hold the state of the fuse element is set after completion of the precharge operation in the tFPRE period. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009099156(A) 申请公布日期 2009.05.07
申请号 JP20070266453 申请日期 2007.10.12
申请人 ELPIDA MEMORY INC 发明人 YOKO HIDEYUKI
分类号 G11C29/04;G11C11/4072 主分类号 G11C29/04
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