| 摘要 |
PROBLEM TO BE SOLVED: To provide an information processor performing encryption and authorization value creation without increasing a circuit scale. SOLUTION: An input register section 20 is provided with three registers 22, 24, 26 each storing 8 bytes of input packet data in performing an encryption process and an authorization value creation process on input packet data. After the authorization value creation process using a first EXOR circuit 12 and an AES circuit 14 is performed on the data stored in the registers 22, 24, the encryption process is performed on the input packet data using the first EXOR circuit 12 and the AES circuit 14 on the data stored in the registers 24, 26, and the encrypted data encrypted in the encryption process is stored in the registers 24, 26. The data in the input register section 20 are then shifted by 16 bytes, and the 16 bytes of data that are a continuation of the input packet data are stored in the registers 24, 26. The data are controlled to repeatedly carry out this process. COPYRIGHT: (C)2009,JPO&INPIT |
