发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of preventing destruction of a circuit (for example, an analog circuit), having a low allowable operation frequency in scan test. SOLUTION: When a scan test mode signal is "1", each output signal from the first AND circuit 11 and the second AND circuit 12 is fixed at a low level, and an output signal from an OR circuit 13 is fixed at a high level. Consequently, it is so set that each output signal from the fourth flip-flop FF4 to the sixth flip-flop FF6 is not transferred to the first to third analog circuits 21-23, in the scan test; whereas each output signal rom the fourth flip-flop FF4 to the sixth flip-flop FF6 propagates to the first to third analog circuits 21-23 during normal operation. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009097879(A) 申请公布日期 2009.05.07
申请号 JP20070266860 申请日期 2007.10.12
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 NISHIYAMA TAKAKO;ITO HIDEO
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
代理机构 代理人
主权项
地址