| 摘要 |
The present invention produces a low-cost reliable non-volatile memory with multiple write cycles. The memory circuit trades full configurability for increased reliability and decreased cost by providing a limited number of write or rewrite cycles utilizing an indirectly accessible register set that writes data into fully configurable memory. The circuit is useful for both providing upgrade capability to electronic computational systems and data robustness to logic storage systems. Less configurable non-volatile memory (NVM) block 201 is utilized in tandem with directly accessible fully configurable memory block 207. Arbiter 206 implements the redundant addressing that enables the multiple write cycle NVM functionality. Each block of less configurable memory contains an address segment 203 and a data segment 204. Address segment 203 refers to a specific cell in directly accessible memory 209. When the data in directly accessible memory 209 needs to be refreshed arbiter 206 will cycle through the stack of less configurable memory. For each block in the stack, arbiter 206 will load data segment 204 into the cell in directly accessible memory block 207 that has a corresponding address to the address stored in address segment 203. Since arbiter 206 moves down the stack sequentially, blocks that have redundant addresses will effectively rewrite the data stored in a preceding block. The result is an inexpensive NVM with rewrite functionality.
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