发明名称 Variability-Aware Asynchronous Scheme for Optimal-Performance Delay Matching
摘要 A system for automatically transforming a given synchronous circuit description into an equivalent and provably correct desynchronized circuit description. Included in the automated transformation are techniques for synthesizing a variability-aware controller using a two-phase protocol, techniques for synthesizing a variability-aware controller using gated clocks and testability circuits, techniques for synthesizing a variability-aware controller optimized for performance, techniques for initializing the synthesized controller, techniques for dynamically minimizing power requirements, and techniques for interfacing the desynchronized circuit with external synchronous circuits. Also disclosed are techniques for implementing a system for automatically transforming a synchronous circuit description into an equivalent and provably correct desynchronized circuit description within the context of an electronic design automation design flow. Exemplary circuits used in the application of the aforementioned techniques are provided. Application of mathematical models and techniques used for proving equivalence between the input description and the resulting desynchronized circuit are presented and explained.
申请公布号 US2009119621(A1) 申请公布日期 2009.05.07
申请号 US20080265640 申请日期 2008.11.05
申请人 CORTADELLA JORDI;SINGHAL VIGYAN;TUNCER EMRE 发明人 CORTADELLA JORDI;SINGHAL VIGYAN;TUNCER EMRE
分类号 G06F17/50 主分类号 G06F17/50
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