SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of preventing a deterioration of a latch-up resistance, even if a power supply protective circuit and an input and output circuit are adjacently or closely arranged. SOLUTION: To arrangements of an N+diffusion layer 221 and a P+diffusion layer 222 of an input and output circuit 2, a P+diffusion layer 211, an N+diffusion layer 212, a P+diffusion layer 213 and an N+diffusion layer 214 forming a thyristor 11 of a power supply protective circuit 1 are lined up in the same row adjusted to a row of the N+diffusion layer 221 and the P+diffusion layer 222. An N+diffusion layer 312 connected to a VSS and used as a cathode of the thyristor 11 is arranged in a position far from a P+diffusion layer 321 connected to an I/O within the input and output circuit 2. A P+diffusion layer 313 connected to a VDD and used as an anode of the thyristor 11 is arranged in a near position from an N+diffusion layer 322 connected to the VDD within the input and output circuit 2. COPYRIGHT: (C)2009,JPO&INPIT