发明名称 METHOD OF FORMING EMBEDDED WIRING
摘要 PROBLEM TO BE SOLVED: To provide a method of forming embedded wiring having a low wiring resistance and excellent in the EM resistance and the reliability. SOLUTION: After forming a groove 12 in the insulating layer 11 formed on a semiconductor substrate 10, a barrier metal layer 13 is formed on the insulating layer 11 by an ALD method to cover the side faces and the bottom face of the groove 12, and impurity layers 14, 17 are formed on the surface thereof according to an ion implantation method or ALD method. Then, after alloying the barrier metal 13 and the impurity layers 14, 17, the embedded wiring layer consisting of a Cu seed layer 15 and a Cu plating layer 16 is formed in the groove 12, and then the thermal diffusion of the impurity element in the alloyed barrier metal layer 13 into the embedded wiring layer is carried out. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009099585(A) 申请公布日期 2009.05.07
申请号 JP20070266681 申请日期 2007.10.12
申请人 PANASONIC CORP 发明人 AOI NOBUO
分类号 H01L21/3205;H01L21/768;H01L23/52 主分类号 H01L21/3205
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