| 摘要 |
<p>A pattern formation method of a semiconductor device, and to a manufacturing method of a flash memory, in which spacer patterning technology is performed while two hard mask layers having a different etching characteristics are used, such that the patterning can be performed by using only a spacer as a mask in the region which requires a small pattern. Additionally, the patterning can be performed by using a hard mask layer pattern and the spacer as a mask in a region which requires a large pattern. Therefore, the pattern formation method of the invention can be used to form a semiconductor device with patterns having various sizes using just a single patterning.</p> |
