| 摘要 |
<p>The invention relates to the collective fabrication of n 3D module. It comprises a step of fabricating a batch of n dies i at one and the same thin plane wafer (10) of thickness es comprising silicon, covered on one face with electrical connection pads (20), called test pads, and then with a thin electrically insulating layer (4) of thickness ei, forming the insulating substrate provided with at least one silicon electronic component (11) having connection pads (2) connected to the test pads (20) through the insulating layer. The components are encapsulated in an insulating resin (6) of thickness er, filling the spaces between the components, then separated from one another by first grooves (30) with a width L1 and a depth P1 such that ei+er<P1<ei+er+es, the connection pads of components (2) being connected to tracks (3) that are flush with the grooves (30); B1) a step of depositing an adhesive support (40) on the component-side face; C1) a step of removing the silicon wafer (10) so as to expose the test pads (20); D1) a step of electrically testing the components of the wafer via the test pad (20) and of marking the valid components (11′) and/or defective components; and E1) a step of bonding the dies (50) onto an adhesive film (41), each die comprising a valid component (11′) connected to test pads (20) and to at least one track (3), insulating resin (6), and an insulating layer (4), the dies being separated by second grooves (31) of width L2 with which the connection tracks (3) of the valid components (11′) are flush. This step, repeated K times, is followed by a step of stacking the K wafers, of forming metallized holes in the thickness of the stack, which are intended for connecting the dies together, and then of dicing the stack in order to obtain the n 3D modules.</p> |
