发明名称 Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array
摘要 A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.
申请公布号 US7528439(B2) 申请公布日期 2009.05.05
申请号 US20060438419 申请日期 2006.05.23
申请人 MICRON TECHNOLOGY, INC. 发明人 TANG SANH D.;BURKE ROBERT J.;SRINIVASAN ANAND
分类号 H01L29/732 主分类号 H01L29/732
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