| 摘要 |
A mixed signal measurement instrument provides for the display of both analog and logic signal waveforms using a "no dead time" architecture. For a logic signal all trigger events are detected, the logic signal is sampled at a high rate to produce a sampled logic signal data, the sampled logic signal data are delayed to provide a pre-trigger delay and then are drawn in real time in response to the detected trigger events. A FIFO is used to delay the sampled logic signal data, with the position of the trigger event on the display being determined coarsely by an effective depth of the FIFO. The sampled logic signal data may also be compressed into compression codes prior to the FIFO. A fast drawing engine receives the sampled logic signal data from the FIFO as either data samples or compression codes, and draws a logic waveform using four rows of the drawing engine memory-one row for each of four logic states. The vertical position and height of the logic signal waveform on the display is determined when the logic waveform is transferred from the fast drawing engine to a conventional display buffer.
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