Semiconductor device having isolation pattern in interlayer insulating layer between capacitor contact plugs and methods of fabricating the same

摘要

A semiconductor device having an isolation pattern inside an interlayer insulating layer between capacitor contact plugs and methods of fabrication the same: The semiconductor device includes an interlayer insulating layer covering a semiconductor substrate. At least two contact plugs passing the interlayer insulating layer and connected to the semiconductor substrate. An insulating layer pattern, which is formed of a material having an etch rate lower than that of the interlayer insulating layer, covers the interlayer insulating layer between the neighboring contact plugs. An isolation pattern, which is formed of a material having an etch rate lower than that of the interlayer insulating layer, is extended from the insulating layer pattern and located inside the interlayer insulating layer between the neighboring contact plugs. A charge storage electrode contacts the contact plug.