| 摘要 |
An impedance adjusting circuit of semiconductor memory devices is able to adjusting its termination resistance stably. The semiconductor memory device includes a reference range supplying unit for supplying a normal target range corresponding to a ZQ resistance and supplying a micro target range in response to a micro target signal, a termination resistance supplying unit for supplying an output resistance corresponding to a plurality of control codes, a code generating unit for generating the plurality of control codes in order to shift the output resistance within the normal target range and for adjusting the plurality of control codes to shift the output resistance within the micro target range in response to the micro target signal, and a normal shift detecting unit for detecting the output resistance arranged within the normal target range to generate the micro target signal.
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